Address | Width | Meaning |
A0000000 | w | Ether100 CR0: bus mode
1=s/w reset 2=round robin arbitration, 0=rx has priority 0x7C=size of descriptor <<2 0x80=bigendian 0x3F00=DMA burst size <<0x100 |
A0000008 | w | CR1: tx poll demand (releases pending tx process) |
A0000010 | w | CR2: rx poll demand (releases pending rx process) |
A0000018 | w | CR3: rx list base address |
A0000020 | w | CR4: tx list base address |
A0000028 | w | CR5: status
1=tx irq 2=tx stopped 4=tx buffer unavailable 8=tx jabber timeout 0x10=link pass completed 0x20=tx underflow 0x40=rx irq 0x80=rx buffer unavailable 0x100=rx process stopped 0x200=rx watchdog timeout 0x400=early tx irq 0x800=timer expire 0x1000=link fail 0x2000=bus error 0x4000=early rx irq 0x8000=abnormal irq summary 0x10000=normal irq summary 0xE0000=rx process state 0x700000=tx process state 0x380000=error bits |
A0000030 | w | CR6: op mode
1=use hash table for rx addr match 2=rx enable 4=echo of bit 0 8=pass bad frames 0x10=inverse filtering etc |
A0000038 | w | CR7: irq mode |
A0000040 | w | CR8: missed frame and overflow |
A0000048 | w | CR9: boot ROM, serial ROM |
A0000050 | w | CRA: boot ROM programming add |
A0000058 | w | CRB: timer |
A0000060 | w | CRC: SIA status |
A0000068 | w | CRD: SIA connectivity |
A0000070 | w | CRE: SIA tx & rx |
A0000078 | w | CRF: SIA & gpio |
Address | Name | Width | Meaning |
9000.0018 | XMSK | s | mask of VidComp irq's |
9000.001C | XSTS | s (read) | VidComp irq status |
9000.001C | PCI_INT | s (write) | force an irq into the VidComp RISC |
9000.0040 | PSR | timer prescale; typ 4 | |
9000.0044 | TR0 | (read) | timer0 register |
9000.0048 | TR1 | (read) | timer1 register |
9000.004C | DTR | time reference of decode | |
9000.0050 | TP0 | timer 0 period; set to 0x8669 for 30fps, 0xC96A for 20fps | |
9000.0054 | TP1 | timer1 period | |
9000.0058 | TP2 | timer2 period | |
9000.005C | ETR | timer reference of encode | |
9000.0080-9000.008F | fake ISA bus access | ||
9000.00E0 | XDMA_INDEX | w | XDMA Index register |
9000.00E4 | XDMSK | w | XDMA Mask register |
9000.00E8 | XSDMA | w | XDMA software trigger |
9000.00EC | XDSTS | w | XDMA status |
9000.00F0 | XDTS | w (read) | TC status of XDMA |
9000.00F4 | XTCMSK | w | TC mask of XDMA |
9000.00FC | XDMA_HW | w | XDMA height/width register |
90000100-9000013C | w[16] | VidComp DMA engine start point | |
90000140-9000017C | w[16] | DMA picture start point X | |
90000180-900001BC | w[16] | DMA picture start point Y | |
900001C0-900001FC | w[16] | DMA frame memory start address | |
90000240-9000025C | XMIL[0:7] | w[8] | XDMA frame init value L (write only) |
90000280-9000039C | XMIH[0:7] | w[8] | XDMA frame init value H (write only) |
900002C0-900002DC | XMSA[0:7] | w[8] | XDMA frame memory start |
9000.0630-9000.063F | filter control regs | ||
9000.0640-9000.065F | motion estimation control regs | ||
90000660 | w | audio port control | |
90000664 | w | audio serial clock divisor | |
90000668 | w | audio receive frame sync divisor | |
9000066C | w | audio rx word enables lo | |
90000670 | w | audio rx word enables hi | |
90000674 | w | audio tx word enables lo | |
90000678 | w | audio tx word enables hi | |
9000067C | w | audio buffer detect | |
9000.0680-9000.069F | video preprocess and postprocess control regs | ||
900006C0-900006CC | w[4] | I2C data reg; we use ...06C0 (clk) and ..06C4 (serial data) | |
9000.06A0-9000.06BF | internal IO management regs | ||
9000;06D0-9000.06DF | variable length decoder regs | ||
9000.06E0-9000.07FF | variable length coder regs & coef's | ||
90000FA0 | s | Encode command
1=split screen 2=document camera 4=freeze picture release 8=SQCIF,0x10=QCIF,0x18=CIF,0x20=4CIF 0x40=unrestricted motion vector on 0x80=syntax mode on 0x100=advanced prediction on 0x200=PB frames on |
|
90000FA2 | s | Decode command/status
as above |
|
90000FA4 | s | Firmware mode & status
1=encoder run, 0=encoder stop 2=decoder run, 0=decoder stop 0x8000 indicates INTRA picture |
|
90000FA6 | s | inital Q value (1..31) | |
90000FA8 | s | current bit rate (1..255) | |
90000FAA | s | current frame rate (1..30) | |
90000FEC | s | VideoPre control register (video capture) | |
90000FEE | s | VideoPre h delay | |
90000FF0 | s | VideoPre v delay | |
90000FF2 | s | VideoPre h active count | |
90000FF4 | s | VideoPre v active count | |
9100.0000-911F.FFFF | VCOMP_MEM | w[huge] | video compressor frame buffer |
Address | Width | Meaning |
IDE Controller; mem space is not used; see I/O space at 7C0001Fx |